Question 74 The single-input version of the J-K flip-flop that is applied by tying both inputs together is:

• a. Clocked D Flip-Flop
• b. T flip-flop
• c. R-S flip-flop
• d. D latch
• Tag: Digital Logic Design

Question 78 Which of the following is not true when we compare latches and flip-flops?

• a. They differ in the method used for changing their state
• b. Latch is a memory element whose excitation signals control the state of the device
• c. Flip-flop is a memory device that has clock signals control the state of the device
• d. Latches can be divided into common types, including SR, D, JK, and T
• Tag: Digital Logic Design

Question 48 If the two input values of the gate are both 1, the output is 1; otherwise, the output is 0.

• a. The AND-gate
• b. The NOT-gate
• c. Inverter-gate
• d. The OR-gate